PRESS RELEASE

Contact:
Michael O'Brien
Aldec, Inc.
(702) 990-4400 ext. 207
mobrien@aldec.com

FOR IMMEDIATE RELEASE

Henderson, Nevada, February 21st, 2001 -- Aldec, Inc., a leading supplier of HDL design entry and verification tools for field programmable gate arrays (FPGAs), announced today the release of Active-HDL 4.2XE, a version developed specifically for Xilinx devices. The unrestricted simulation performance of Active-HDL 4.2XE achieves a 40% increase in simulation speed over the previous 4.0XE version, providing designers of Xilinx technologies a complete high-performance FPGA design and HDL simulation solution.

Seamless Xilinx Foundation Series™ Import
The Active-HDL 4.2XE software gives users the ability to seamlessly import Xilinx Foundation Series projects, schematics and libraries directly into an HDL verification environment. Once imported, the schematics and other files can be used, which preserves all graphics, attributes, hierarchy structure and settings. It is now easier than ever to reuse previously designed schematics, ABEL files, LogiBlox and CoreGen modules, and Netlists in an HDL environment to retarget these designs to the newest Xilinx device families.

"Foundation Series users have a clear solution to support their existing projects as well as a simple path when migrating to HDL-based design. Active-HDL 4.2XE provides unparalleled performance and value," stated Michael O'Brien, Active-HDL Product Marketing Manager for Aldec.

HDL Simulation for Virtex-II Devices
Active-HDL 4.2XE provides unrestricted VHDL or Verilog simulation supporting all Xilinx device families and the latest Xilinx Virtex-II devices. Additionally, the SIMPRIM library has been built into the Active-HDL simulation kernel to increase timing simulation over the Foundation Series by 50x. The VHDL simulator is IEEE 1076-87/93 compliant while the Verilog simulator complies with the IEEE 1364-95 standard. All users of Xilinx technologies will experience unparalleled integration with Xilinx implementation tools as well as 3rd party synthesis tools all from within the Active-HDL environment. Both beginning and veteran HDL designers will benefit from this powerful design and simulation environment for Xilinx FPGA design.

FPGA Synthesis Tools Supported
The Active-HDL 4.2XE software supports logic synthesis from Exemplar, Synplicity, Synopsys and Xilinx Synthesis Technology (XSTT) directly from its Flow Manager. All interfaces are based on Tcl/Tk scripting, allowing Xilinx customers to use the synthesis software of their choice.

Availability
The product is priced at $2,995.00 and includes the Project Manager, HDL Editor, State Machine Editor, Block Diagram Editor/Schematic Editor, automatic testbench generation, a waveform viewer and editor, and the choice of a VHDL or Verilog simulation kernel. The first year's maintenance is included in the initial sale price. Active-HDL 4.2XE is sold directly by Aldec or Insight Electronics LLC in the U.S. and authorized international distributors. To immediately take advantage of this offer, Active-HDL 4.2XE may be purchased online at www.aldec.com or by contacting Aldec at 800-487-8743.

About Aldec
Aldec has offered PC-based design entry and simulation solutions to FPGA designers for more then 16 years. During this time, Aldec has signed several OEM agreements with IC vendors, such as Xilinx, Inc. (NASDAQ:XLNX) and Cypress Semiconductor Corp. (NYSE:CY). Aldec, Inc., headquartered in Henderson, Nevada, produces a universal suite of Windows-based EDA tools that allow design engineers to implement their designs using several different design entry methods (Schematic Capture, State Machine, Block Diagram, VHDL, Verilog or ABEL). Aldec incorporates patented simulation technology and several design entry tools to provide a complete design entry and simulation solution. Founded in 1984, the company continues to evolve in the Windows-based EDA market as the fastest growing privately held EDA supplier in the world. Additional information about Aldec is available at http://www.aldec.com.